Wei-Jen Chen
Education
Ph.D. in Electrical Engineering 2021.11
- Thesis: Enabling Fine-Grained Voltage Scaling in Energy-Scalable Digital Systems with Timing-Error-Driven Supply Rail Modulation
- National Chung Cheng University (CCU), Chiayi County, Taiwan
Professional Experience
MediaTek Inc. Since mid-June, 2022
Senior Engineer
- Design of adaptive voltage scaling (AVS) related digital IPs for GPU
Himax Technologies, Inc. 2021.11.15–2022.05.31
Staff Engineer
- Design and maintain video datapaths for automotive display driver with embedded timing controller
Low-Power Integrated Circuit (LPIC) Laboratory CCU, 2012.09–2021.11
Graduate Research Assistant
- Conducted research on the digital low-dropout regulator (DLDO) and its application in digital systems
- Developed a fast-turnaround DLDO design flow
- Developed a timing-error-tolerant low-power display system without timing-error detection and correction
- Developed a batteryless multiturn counter in collaboration with Industrial Technology Research Institute
- Workstation administration
Mixed-Signal Integrated Circuit (MSIC) Laboratory NKNU, 2010–2012.06
Undergraduate Research Assistant
- Implemented a novel digital low-dropout regulator
- Workstation administration
Skills
- Full-custom and standard-cell-based integrated circuit design
- Design of integrated voltage regulator
- Frontend and backend integrated circuit design flow
- Full chip physical integration
- Test chip design and tape-out
- FPGA-based prototyping
- Modeling and simulation of systems using MATLAB® and Simulink®
- PCB prototyping
- Operation of electrical and electronic measuring instruments
- Computer programming and data processing
- Technical paper writing
- Scientific graphing
Languages:
- Mandarin and Taiwanese (native)
- English (proficient) – Scored 920 out of 990 in Test of English for International Communication
Honors and Awards
Himax Technologies Doctoral Student Scholarship 2014.10–2018.09
Macronix Golden Silicon Award
- Silver Award, Design Category (with Chang-Ting Kao, Po-Han Lu, and Tsung-Chi Chen)
2021 - Honorable Mention, Design Category (with Chao-Chun Chen and Wei-Chen Liao)
2015
Taiwan National IC Design Contest (ICDC)
- Third Award, Full-Custom Design Category (with Chia-Ming Kao in 2010)
2010, 2014 and 2015 - Finals, Full-Custom Design Category (with Wei-Chen Liao in 2012)
2011–2013
Chip Implementation Center Outstanding Chip Design Award
- Honorable Mention (with Chao-Chun Chen and Wei-Chen Liao)
2015
Selected Publications
Fast-Turnaround Design and Modeling Techniques for a Fast-Transient Digital Low-Dropout Regulator With 3 mV Ripples
Wei-Jen Chen and Chung-Hsun Huang
IEEE Transactions on Power Electronics (Volume: 36, Issue: 6, June 2021)
DOI: 10.1109/TPEL.2020.3040304
A Spatial-Temporal Error Spreading Technique Based on Voltage Dithering Demonstrates a Power Savings of 35% in a Real-Time Video Processing Datapath Without Timing-Error Detection and Correction
Chung-Hsun Huang and Wei-Jen Chen
IEEE Solid-State Circuits Letters (Volume: 3, 2020)
DOI: 10.1109/LSSC.2020.3023501
Low Power Fixed-Latency DSP Accelerator with Autonomous Minimum Energy Tracking (AMET)
Chung-Hsun Huang, Wei-Jen Chen, Keng-Jui Chang, Yi-Hsun Ting, Keng-Chang Hsu, Yu-Fu Pan, Chao-Chun Chen, Yuan-Hua Chu, Tay-Jyi Lin, and Jinn-Shyan Wang
In Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS)
DOI: 10.1109/HOTCHIPS.2014.7478837
A 0.7V Input Output-Capacitor-Free Digitally Controlled Low-Dropout Regulator With High Current Efficiency in 0.35μm CMOS Technology
Yu-Lung Lo and Wei-Jen Chen
Microelectronics Journal (Volume: 43, Issue: 11, November 2012)
DOI: J.MEJO.2012.07.008